1. Technical Field of the Invention
The present invention relates to a thin film semiconductor device and a display device using thereof as a driving substrate, and manufacturing method of such display device. More specifically, the present invention relates to a structure and a manufacturing technology of the thin film semiconductor device having bottom gate type thin film transistors with polycrystalline silicon or the like as their active layers formed as integrated circuits on an insulating substrate.
2. Description of the Related Art
For a display purpose, a thin film semiconductor device is suitably used for a driving substrate of an active matrix type liquid crystal display or the like, and its development is now vigorously pursued. Polycrystalline silicon or amorphous silicon is used for active layers of the thin film transistors. Particularly, the thin film transistors of the polycrystalline silicon can realize the active matrix type color liquid crystal display device in compact and with high definition, and attract much attention.
According to the conventional semiconductor technology, the polycrystalline silicon is utilized only as materials of electrodes and resistors because the thin film transistors are formed as pixel switching devices on the insulating substrate comprising a transparent glass or the like, but this technology has made it possible for the polycrystalline silicon to be used as the active layer. This is the only one technology that can realize the thin film transistors for the high-performance switching devices capable of high-density designing to achieve an image quality required in the market. Concurrently, this technology has also made it possible to form the peripheral circuitry, which has hitherto used external installed ICs, on the same substrate of the pixel array section with the same process. Further the active matrix liquid crystal display having high-definition and integral-typed peripheral circuitry, which was unable to be achieved by using the amorphous silicon thin film transistors, may be realized.
The polycrystalline silicon has larger carrier mobility compared with the amorphous silicon. Therefore, current driving capability of the polycrystalline silicon thin film transistors becomes large, which makes it possible that the peripheral circuitry such as a horizontal scanning circuit and a vertical scanning circuit requiring high-speed driving are concurrently formed on the same substrate as the thin film transistors for the pixel switching. Consequently, the number of signal wires taken out externally from the thin film semiconductor device for display purpose can be reduced in great deal. Additionally, a CMOS (Complementary Metal-Oxide Semiconductor) circuit formed as integrated circuits with N-channel type and P-channel type thin film transistors may be formed on-chip, and a level shift circuit may be built-in, and timing signals may be driven with low voltage.
As the device technology and the process technology for the thin film transistors, the so-called high temperature process technology adopting the process temperature of 1000° C. or more has conventionally been established. The characteristic of this high temperature process is to reform the semiconductor thin film deposited on a high heat-resistant substrate such as quartz by applying a solid phase growth.
The solid phase growth is a method of thermally treating the semiconductor thin film at a temperature of 1000° C. or more, and it enlarges every one of crystal grains included in the polycrystalline silicon which is a minute aggregate of the silicon crystal at the depositing stage.
The polycrystalline silicon acquired by this solid phase growth can obtain high carrier mobility in the order of 100 cm2/v×s. In order to execute such high temperature process, it is imperative to adopt a substrate superior in heat resistance, and quartz has conventionally been used for the substrate. However, the quartz has the disadvantage from the standpoint of reducing the manufacturing cost.
Instead of the above-described high temperature process, a low temperature process adopting treatment temperature of 600° C. or less has been developed. As part of adopting the low temperature process to the manufacturing process of the thin film semiconductor device, a laser anneal treatment using a laser beam is attracting attention. This process is such that the laser beam is irradiated to an non-single crystal semiconductor thin film of the amorphous silicon or the polycrystalline silicon or the like deposited on the low heat-resistant insulating substrate such as glass or the like to locally melt by application of heat, and thereafter, during its cooling process, the semiconductor thin film is crystallized. The polycrystalline silicon thin film transistors are formed as integrated circuits with this crystallized semiconductor thin film operating as the active layer (channel region). As the carrier mobility of the crystallized semiconductor thin film becomes high, the thin film transistors can achieve high performance to a certain degree.
Incidentally, a top-gate typed structure is conventionally the mainstream for the thin film transistors. In the top-gate structure, the semiconductor thin film is deposited on the insulating substrate, and then the gate electrodes are further formed above via a gate insulating film. For the low temperature process, a low-cost and large-sized glass plate is used as the insulating substrate. This glass plate contains much impurity metal of Na (sodium) or the like, so that Na is localized according to driving voltage for the thin film transistors. There is a problem of reliability caused by variation of the characteristic of the thin film transistors due to this electric field. Against this, a bottom-gate typed structure suitable for the low temperature process has recently been developed.
According to this structure, the gate electrodes comprising metal film or the like are arranged on the insulating substrate made of glass plate or the like, on top of which the semiconductor thin film is formed via the gate insulating film. The gate electrodes have an effect of shielding the electric field within the glass plate. From the standpoint of the structure, the bottom-gate type structure is superior to the top-gate type structure in reliability.
However, the bottom-gate structure causes a big problem when crystallization by the laser anneal treatment is conducted. In the semiconductor thin film to be recrystallized, the part for a channel region is generally located right above the gate electrodes, and the parts for a source region and a drain region are on the glass plate. On this account, when energy is provided by irradiation of the laser beam, there occur differences in conductive condition or dissipating condition of heat on the glass plate and on the metallic gate electrodes. Consequently, due to the fact that the optimum laser energy is different in the channel region, source region and drain region respectively, it is impossible to execute the laser irradiation with the optimum energy to acquire large carrier mobility.
More specifically, in the case where recrystallization by the laser anneal is conducted, the laser beam is concurrently irradiated to the semiconductor thin film both on the metallic gate electrodes and on the glass plate. In this case, during the semiconductor thin film is once melted and then becomes solidified by cooling process, heat is dissipated on the metallic gate electrodes horizontally through the gate wiring, whereby the semiconductor thin film is solidified in comparatively short time. For this reason, on the metallic gate electrodes and on the glass plate, the crystal grains of the recrystallized semiconductor thin film are different in sizes, which causes the carrier mobility to be non-uniform.
To be extreme, when trying to make large the crystal grain sizes of the semiconductor thin film on the metallic gate electrodes, the semiconductor thin film on the glass plate may evaporate due to excessively large irradiation energy. On the contrary, when trying to make the normal crystal condition of the semiconductor thin film on the glass plate, the grain size of the semiconductor thin film on the metallic gate electrodes becomes small. In other words, when trying to irradiate the laser beam at the time of the laser anneal treatment with the optimum energy to the semiconductor thin film both on the metallic gate electrodes and the insulating substrate comprising glass or the like, there occurs a problem that the process margin becomes very narrow.
The process margin as referred here represents the limit permissible in the manufacturing process with respect to the irradiation energy density of the laser beam. Conventionally, this process margin was very narrow, which necessitated to strictly suppress the variation of the irradiation energy density of the laser beam, thereby accompanying a great deal of difficulty.
Additionally, in the bottom gate structure, the semiconductor thin film is formed above the gate electrodes via the gate insulating film. The gate electrodes normally have a thickness of 100 nm or more, so that on the surface of the insulating substrate there arises a level difference attributable to the thickness of the gate electrodes. The semiconductor thin film is so formed as to get over the level difference existing in the gate electrodes though via the gate insulating film. At the part of the level difference in the semiconductor thin film to be got over, the film thickness tends to become thin as compared with the film thickness of the flat part.
When an etching treatment is conducted in the process after the semiconductor thin film has been formed and crystallized by laser anneal, the semiconductor thin film which has become thin at the level difference part may be corroded with chemical agents or the like, and pinholes may be produced. The case may exist that the semiconductor thin film and the gate electrodes establish a short circuit through these pinholes, which has presented the cause of defect for the thin film transistor devices.